Davicom DM9051AIN 10/100Mbps PHY SPI Fast Ethernet controller IC

Davicom

DM9051AIN

SPI, Ethernet, PHY

SMT

25+

Taiwan, China

Network Interface Adapter, Surveillance Camera, Embedded System, Ethernet Hub, Ethernet Switch

PHY

DM9051 series

The DM9051(I) is a fully integrated and cost-effective low pin count single chip Fast Ethernet controller with a Serial Peripheral Interface (SPI), a 10/100M PHY and MAC, and 16K-byte SRAM. It is designed with low power and high performance process interface that support 3.3V with 5V IO tolerance. The PHY of the DM9051(I) can interface to the UTP3, 4, 5 in 10Base-T and UTP5 in 100Base-TX with HP Auto-MDIX.It is fully compliant with the IEEE 802.3u Spec. Its Auto-Negotiation function will automatically configure the DM9051(I) to take the maximum advantage of its 10M or 100M abilities. The DM9051(I) supports IEEE 802.3az in PHY and MAC to save power consumption when Ethernet is idle. The IEEE 802.3x Full-Duplex flow control and Half-Duplex back-pressure function also supported to avoid Ethernet packet loss with link partner. The slave SPI interface is designed to support SPI clock mode 0 and 3 that compatible with the all master SPI interface of CPU. The clock speed can up to 50Mhz to co-operation with most high throughput master SPI. The SPI burst command format is code-effective to minimize the command overhead in access DM9051(I) internal registers and packet data in memory.

32-pin QFN

Slave SPI with clock speeds up to 50MHz for high throughput applications , Supports SPI clock mode 0 and 3 , Supports 10BASE-T and 100BASE-TX , Supports 100M Fiber interface and multiple Fiber mode signal detection , Supports HP Auto-MDIX crossover function in 10BASE-T and 100BASE-TX , Supports IEEE 802.3az Energy Efficient Ethernet (EEE) , Supports back pressure flow control for Half-Duplex mode , Supports IEEE802.3x flow control for Full-Duplex mode , Supports wake up frame, link status change and magic packet events to generate remote wake on LAN (WOL) signal , Supports IPv4 IP/TCP/UDP checksum generation and checking , Supports application for IPv6 IP/TCP/UDP protocol stack , Configurable of internal transmit/receive buffers within 16K-Byte memory , Built-in OTP memory suitable for MAC address , Eliminates the need of bandgap resistor , Supports printed circuit board level of data security , Built-in integrated regulator for internal core use , Reaches Class B EMI standard , Industrial Temperature Range: - 40℃ to +85℃ , Multi-Voltage I/O VDDIO Supply (1.8V, 2.5V, 3.3V)